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  this is information on a product in full production. may 2015 docid023674 rev 2 1/32 HDMI2C1-14HD esd protection and signal conditioning for hdmi? 2.0 source interface datasheet ? production data features ? hdmi ? 2.0 (4k/2k 60fps) compliant from -40 to 85 c ? tmds high bandwidth and very low clamping voltage esd protection ? 8 kv contact esd protec tion on connector side ? supports direct connection to low-voltage hdmi ? asic and/or cec driver (down to 1.8 v) ? ddc capacitive decoupling between asic and hdmi ? connector and dynamic pull-up for long cable driving ? back drive protection on 5 v, ddc bus and cec ? cec independent structure from main power supply ? hdmi ? ethernet and audio return channel (heac) compatible ? hpd pull down and signal conditioning ? short-circuit protection on 5 v output ? proposed in qfn 36 leads 500 m pitch benefits ? easy hardware design and speed-up certification of hdmi ? 2.0 ? pin map sequence compliant with hdmi ? connector type a ? high integration level fo r minimal pcb footprint ? efficient protection of sensitive hdmi ? asics ? very low power consumpt ion in stand-by mode ? wake-up from stand-by through cec bus ? allow to drive long cable and poor quality cable ? companion chip for stmicroelectronics? stixxxx hdmi ? decoders complies with the following standards ? hdmi ? 2.0 version ? iec 61000-4-2 level 4 ? jesd22-a114d level 2 applications ? consumer and computer electronics hdmi ? source device such as: ? set-top boxes / adsl boxes ? dvd and blu-ray disk systems ? notebook / pc graphic cards ? game console ? home theater description the HDMI2C1-14HD is a fully integrated esd protection and signal conditioning device for control links and tmds data video channels of hdmi ? transmitters (source). the HDMI2C1-14HD is a si mple solution that provides hdmi ? designers with an easy and fast way to reach full compliance with the stringent hdmi ? 2.0 (4k/2k 60fps) on a wide temperature range. tm: hdmi: the hdmi logo and high-definition multimedia interface are trademarks or registered trademarks of hdmi licensing llc. www.st.com
contents HDMI2C1-14HD 2/32 docid023674 rev 2 contents 1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 cec line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 ddc functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 heac link and hpd line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3.1 hpd line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3.2 heac functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 +5v protection and fault line functional block description . . . . . . . . . . . . .11 2.5 back drive protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.6 tmds channels esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.7 application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 qfn package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.2 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5 recommendation on pcb assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.1 stencil opening design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.2 solder paste . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.4 pcb design preference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.5 reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
docid023674 rev 2 3/32 HDMI2C1-14HD functional description 32 1 functional description the HDMI2C1-14HD is a fully inte grated esd protection and sign al conditioning device for control links and tmds data video channels of hdmi ? transmitters (source). the control stage provides a bidirectional buffer , integrating signal co nditioning and dynamic pull-up on ddc bus for maximum system robustness and signal integrity. the heac (hdmi ethernet and audio return channels) function is supported, making the component fully compliant with hdmi 2.0 version. a bidirectiona l cec block is integrated, able to wake-up the application from stand-by mode (all power supply off, except the cec power supply). all video format specified by hdmi? 2.0 standard like 1080p60 3d, 4k/2k 60fps are supported, giving maximal flexibility to de signers. the +5 v supp lied to the cable is protected against accidental surge current and sh ort circuit. all these features are provided in a single 36 leads qfn package featuring natural pcb routing and saving space on the board. the HDMI2C1-14HD is a simple solution that provides hdmi? designers with an easy and fast way to reach full compliance with the stringent hdmi? 2.0 on a wide temperature range. stmicroelectronics proposes a dual ve rsion dedicated for the sink interfaces: the hdmi2c2-14hd. figure 1. pin out, top view 9''b9 9b287 qf '$7b' '$7b'  '$7b' '$7b'  '$7b' '$7b'  '$7b&. '$7b&.  6'$b, & +3'b, & (6'b',6&+ '$7b'b, & '$7b' b,& '$7b'b, & '$7b' b,& '$7b'b, & '$7b' b,& '$7b&.b, & '$7b&. b,& 6&/b, & 9''b&(& *1' &(&b, & +($ & 9''b, & +3' )$8/7 +($ & qf 6'$ 8wlolw \ 9''b&(&b, & 6&/ &(& 3lq 3 l q 
functional description HDMI2C1-14HD 4/32 docid023674 rev 2 figure 2. block diagram 9''b9 9''b,& )$8/7 +3'b,& 9''b&(&b,& &(&b,& 9b287 +3' &(& 9''b&(& 8wlolw\ (6'b',6&+ +($& +($& 70'6 olqhv,1 70'6 olqhv287 [ olqhv pdwfklqj 6&/b,& 6'$b,& 6'$ 6&/ ,&gulyhu %rrvwhu 273 'ulyhu 70'6 9 ''& +($&+3' &(& +ljk vshhg (6' surwhfwlrq 89/2 89/2 89/2
docid023674 rev 2 5/32 HDMI2C1-14HD application information 32 2 application information 2.1 cec line description the cec bus is described in the hdmi? standards as the consumer electronics control. it provides control functions between all the various audiovisual equipments chained in the user's environment. the cec block integrated in the hdmi2c1-14 hd implements a level shifter, shifting the cable cec +3.3 v voltage (v dd_cec ) down to the asic power supply voltage (v dd_cec_ic ) that can be as low as 1.8 v. the figure 3 shows the functional di agram of the integrated cec block. figure 3. cec link functional diagram in case of no activity on the cec bu s, or if the cec driver is off (v dd_cec_ic = 0), the cec pin is put in high impedance mode (open circuit) protecting the circuitry and the application against hazardous back drive. the figure 4 illustrates the normal operating mode of the cec block when the ic from the source and when the sink drives the communication. figure 4. simplified view of the electrical parameters of the cec block cec_ic vdd_cec_ic cec vdd_cec vdd_cec_ic vdd_cec cec driver uvlo ctrl circuit enable 1 3 5 7 9 11 12 13 14 15 16 17 18 19 2 4 6 8 10 hdmi connector decoupling decoupling capacitance capacitance r pu_cec_ic hbm iec61000-4-2 r pu_cec_b us anti bac k drive diode cable side asic side v dd_cec_ic cec_ic v dd_cec cec v tdown_cec v tup_cec v hyst_cec v dd_cec_ic cec_ic v dd_cec cec v il_cec_ic v ih_cec_ic block in high impedance level shifting source ic drives sink drives through hdmi cable block in high impedance block in high impedance level shifting block in high impedance t t t t 10% 90% t fall_cec t rise_cec
application information HDMI2C1-14HD 6/32 docid023674 rev 2 in case the application is set in stand-by mo de, the +5 v main supply of the application is generally powered off in order to reduce as much as possible the global power consumption. the cec driver can be the only device still working in low power mode, allowing a wake up of the wh ole application through the cec line. when the main power supply +5 v is switched off, and if the cec bus is still active (v dd_cec power in on state), the HDMI2C1-14HD keeps the ce c bus working properly while all other outputs of the component are put in high impedance mode. the cec output (cable side) integrates a pr otection against esd which is compliant with iec61000-4-2 standard, level 4 (8kv contact). 2.2 ddc functional block description the ddc bus is described in the hdmi ? standards as the display data channel. the topology corresponds to an i2c bus that must be compliant with the i2c bus specification version 5 (october 2012). the ddc bus is made of 2 lines: data line (sda) and clock line (scl). it is used to create a point to point communication link from the source to the sink. eedid and hdcp protocols are flowing through this link, making this i2c communication channel a key element in the hdmi ? application. the ddc block integrated in the hdmi2c1-14 hd allows a bidirectional communication between the cable and the asic. it is fully compliant with the hdmi ? 2.0 standard and its cts, and with the i2c bus specif ication version 2.1. it is shifting the 5v voltage from the cable (v 5v_out ) down to the asic voltage level (v dd_ic ) that can be as low as 1.8 v. the figure 5 shows the functional diagram of the ddc block integrated in the HDMI2C1-14HD device. figure 5. ddc bus functional diagram (scl and sda lines) the figure 6 illustrates the electrical paramete r of the ddc block specified in table 8 . scl_ic sda_ic vdd_ic reshaping circuit vdd_5v 5v_out scl sda vdd_ic hdmi asic +5v uvlo vdd_5v 5v_out enable drive hdmi connector decoupling capacitance 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10 r pu_asic hbm r pu_bus iec61000-4-2 dynamic pull -up
docid023674 rev 2 7/32 HDMI2C1-14HD application information 32 figure 6. simplified view of the electrical parameters of the ddc block the hdmi ? standard specifies that the max capacitance of the cable can reach up to 700 pf. knowing that the max capacitance of the si nk input can reach up to 50 pf, this means that the i2c driver must be able to drive a load capacitance up to 750 pf. on the other hand, the i2c standard specifies a maximum rise time of the signal must be lower than 1 s in order to keep the signal integrity. taking into account the max cable capacitance of 750 pf, it is not possible to guarantee a rise time lower than 1 s in worst case. therefore, a dynamic pull-up has been integrated at the output of sda and scl lines and synchronized with the i2c driver. this signal booster accelera tes for a short period the charging time of the equivalent cable capacitance, allowing to drive any hdmi ? cable. the figure 7 illustrates the benefit of the dynamic pull-up inte grated in the hdmi 2c1-14hd device. 5v_out sda v dd_ic sda_ic v tdown_ic t rise_bus v tup_ic 70% 30% v tdown_bus v tup_bus v hyst_bus source ic drives asic side cable side sink drives through hdmi cable t fall_bus t t
application information HDMI2C1-14HD 8/32 docid023674 rev 2 figure 7. benefit of the dynamic pull-up on the ddc bus in order to activate the ddc block, the v dd_5v has to reach the specified v dd_5v_on threshold (see table 4 ). in addition, the inputs and outputs of the bidirectional level shifters (scl, sda, scl_ic, sda_ic) must be set to a high level after the power-on, and the hpd line has to be activated one time. the ddc outputs (scl and sda on cable side) in tegrate a protection against esd which is compliant with iec61000-4-2 standard, level 4 (8 kv contact). r pu_bus 5v_out 750pf dynamic pull -up hdmi? cable model signal on the cable ic control 5v_out 5v_out v v dd_ic dd_ic ic control signal on the cable rise time out of i2c specification risk of communication failure rise time compliante with i2c specification signal integrity ok even on 750 pf load capacitance i2c driver without dynamic pull-up i2c driver with dynamic pull-up r pu_bus 5v_out hdmi? cable model 750pf logical circuitry synchronized with i2c bus
docid023674 rev 2 9/32 HDMI2C1-14HD application information 32 2.3 heac link and hp d line description the HDMI2C1-14HD proposes a unique solution in order to manage and protect both the heac and the hpd links. the figure 8 shows an overview of the function diagram of the integrated block. figure 8. heac / hpd / utility functional block diagram this block simplifies the design and the pcb la yout of the hpd and heac functions. simply connect the 2 pins from the hdmi connector to one side of the device, and then use the 3 dedicated outputs on the other side of the de vice to manage separately the hpd and the heac links. both hpd and utility inputs (c able side) integrate a protec tion against esd which is compliant with iec61000-4-2 standard, level 4 (8 kv contact). 2.3.1 hpd line description the hpd line is described in the hdmi? standar ds as the hot plug de tect function. this line is used by the source device in order to detect if a sink device is connected through an hdmi cable. the integrated hpd block is pulling down the line via a curr ent source. when the input voltage is detected to be higher than a threshold level v th_hpd , the signal is converted into a high state level on the asic side, at the voltage level of the asic power supply v dd_ic . otherwise, hpd_ic pin remains in low state. the electrical parameters relevant to the hpd block and specified by the table 7 are illustrated in the figure 9 . hpd hpd_ic utility hdmi asic or ic vdd_ic matching utility / heac+ hpd / heac- heac+ heac - vdd_ic hdmi connector 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10 iec61000-4-2 iec61000-4-2 hbm decoupling capacitance
application information HDMI2C1-14HD 10/32 docid023674 rev 2 figure 9. simplified view of the electrical parameters of the hpd block 2.3.2 heac functiona l block description the heac link is described in the hdmi ? 1.4 and hdmi ? 2.0 standards as the hdmi ? ethernet and audio return channel. it corresp onds physically to one differential wired pair made of the utility line and the hpd line. tw o signals are transmit ted through this link. the first signal corresponds to the hdmi ? ethernet channel (hec). the signal is transmitted in differential mode (bidirectional) through the heac link. it is specified by the 100base-tx ieee 802.3 standard (fast ethernet 100mbps over t wisted pair). therefore, the hec integrates an ethernet link into the video cable, enabling ip-based applications over the hdmi ? cable. the second signal corresponds to the audio return channel (arc). the signal is transmitted either in common mode (unidirectional, from sink to source) through the heac link. it is specified by the iec 60958-1 standar d. the arc function integrates an upstream audio capability, simplifying the cabling of the audiovisua l equipment. it is no more necessary to use a coaxial cable from tv to audio amplifier. the HDMI2C1-14HD helps the designer to impl ement this high added value heac function in the application, protecting the link against the esd with no disturbance of the signal. it provides 2 distinct outputs heac+ and heac- in order to ease as much as possible the pcb layout. hpd_ic signal signal on hpd link v il_hpd v ih_hpd 5v
docid023674 rev 2 11/32 HDMI2C1-14HD application information 32 2.4 +5v protection and fault line functional block description the +5 v power supply that the source device has to provide to the hdmi ? cable is described by the hdmi ? 2.0 standard. it must be protec ted against accidental short circuit that could occur on the cable side. the HDMI2C1-14HD device embeds a low drop current limiter. if an over-current is detected, the HDMI2C1-14HD limits the current through the +5 v power supply.if the current is too high (short circuit) , the device opens the +5 v. furthermore, the HDMI2C1-14HD device embeds also an over temperature protection (otp). if the internal temperature of the device reaches a too high value, the +5 v supply is opened in order to protect the application. in case either the curr ent limiter or the otp is triggered, the fault pin switches down to low state level (open drain topology) in order to optionally inform the hdmi ? asic that an abnormal situation has been detected (option). an under voltage lockout (uvlo) is also integr ated in the block. it checks the main +5 v power supply state, and enables the 5v_out only if the main power supply has reached a minimal value v dd_5v_on . the figure 10 shows the functional diagram of the current limiter block. figure 10. +5 v functional diagram to summarize, the short circuit protection an d the over temperature protection features are providing a high robustness level of the applicati on. on top of this, the fault line can be used in order to improve the user experience. the 5v_out pin integrates a protection against esd which is compliant with iec61000-4-2 standard, level 4 (8 kv contact). the decoupling capacitance is mandatory, according to the power management state of the art. vdd_5v +5v_out ctrl 5v fault hdmi asic or ic vdd_ic uvlo current sensor otp r pu_fault hdmi connector low drop current limiter decoupling decoupling capacitance capacitance hbm hbm iec61000-4-2 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10
application information HDMI2C1-14HD 12/32 docid023674 rev 2 2.5 back drive protection figure 11. back drive current diagram thanks to the innovative switch architecture , back drive current is blocked whatever back drive current is coming from +5v_out and/or ddc lines (see figure 11). in case of no activity on cec bus, or if the cec driver is off (v dd_cec = 0), the output cec pin is put in high impedance mode (open circuit) protecting the circuitry and the application against hazardous back drive. 2.6 tmds channels esd protection the tmds (transient minimized differential signaling) channels are described by the hdmi 2.0 standard. a total of 4 unidirectional different ial pairs are used to transmit the video data to the sink device. there are 3 channels dedicated to the video data, and 1 channel dedicated to the clock. the HDMI2C1-14HD provides a simple pcb layo ut solution, directly compliant with hdmi connector type a. it protects the applicatio n against the esd according the iec61000-4-2 level 4 standard (+/-8 kv contact). the high bandwidth of this esd protection allows to transmit hd video data with no disturbance of the signal up to 5.94 gbps per channel. a capacitor can be optionally connected to the esd_disch pin in order to enhance the esd protection performances. 9b6lqn 9b287 &deoh 6'$6&/ 6'$6&/ %dfngulyhfxuuhqw sdwk 9b,1
docid023674 rev 2 13/32 HDMI2C1-14HD application information 32 figure 12. tmds lines esd protection functional diagram 2.7 application block diagrams the figure 13 shows an application block diagram proposal, implementing all the possible options. the tmds channels are simply conn ected to the connector and to the source hdmi asic. the diagram shows that the cec dr iver can be totally independent from the hdmi asic. by this way, even if the +5 v po wer supply and/or if the hdmi asic is sleeping in stand-by mode, the cec bus is still active in low power mo de. the designer has then all the tools to optimize the power consumption of the global application in stand-by mode, and has the possibility to implement a smart wake-up through the cec bus enhancing the final user experience. figure 13. application block diagram dat_d2+ dat_d2 - dat_d1+ dat_d1 - dat_d0+ dat_d0 - dat_clk - 5v_out dat_clk+ esd_dsich hdmi asic dat_d2+_ic dat_d2 - _ic dat_d1+_ic dat_d1 -_ic dat_d0+_ic dat_d0 -_ic dat_clk - _ic dat_clk+_ic hdmi connector vdd_ic iec61000-4-2 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10 cec driver +5v scl_ic sda_ic sda scl cec bus vdd_cec_ic vdd_ic vdd_ic vdd_cec vdd_5v vdd_ic fault hpd_ic vdd_cec_ic cec_ic 5v_out hpd sda scl cec vdd_cec utility esd_disch vdd_ic 4 tmds channels 8 lines hpd ddc data hpd / heac- utility / heac+ heac- heac+ over current detect tmds lines in tmds lines out heac- heac+ hdmi2c1 hdmi asic hdmi connector -14hd tmds data 2+ tmds data 2 - tmds data 1+ tmds data 1 - tmds data 0+ tmds data 0 - tmds clock+ tmds clock - +5v power c6 c4 c3 r2 r3 c2 r1 d1 c1 c5 r6 r4 r5 ddc clock r7 gnd
application information HDMI2C1-14HD 14/32 docid023674 rev 2 note: scl_ic, sda_ic, and cec_ic have to be driven with an asic working with open drain outputs. figure 14. pcb layout example the figure 14 illustrates the fact that the hdmi2 c1-14hd pin config uration eases and optimizes the pcb layout of the hdmi interfac e. the proposed pin-out sequence is directly compliant with hdmi connector type a. table 1. block diagrams references ref. typical values comment r1 27 k ? pull-up resistance on cec bus, specified by the hdmi standard r2, r3 1.8 k ? pull-up resistances on ddc bus, specified by the hdmi standard r4, r5 10 k ? pull-up resistance on ddc bus, asic side, value selected to be compliant with i2c levels r6 270 k ?? to ????? pull-up resistance on cec line, asic side r7 10 k ? pull-up resistance on fault line (option) d1 bat54 small schottky diode blocking back drive current flowing toward the v dd_cec supply c1 to c5 100 nf decoupling capacitance on power supplies c6 1 f esd protection enhancement capacitance (option) hdmi connector type a vdd_cec - 5v_out cec driver vdd_ic vdd_cec_ic vdd_cec vdd_cec_ic vdd_cec_ic vdd_5v 5v_out d1 r1 r2 r3 c4 c2 c1 c5 c3 c6 r4 r5 r6 r7 tmds data2+ tmds data2 shield tmds data2 - tmds data1+ tmds data1 shield tmds data1 - tmds data0+ tmds data0 shield tmds data0 - tmds clock+ tmds clock shield tmds clock - cec utility / heac+ scl sda ddc/cec gnd / heac shield +5v power hpd / heac - vdd_5v 5v_out nc dat_d2+ dat_d2 - dat_d1+ dat_d1 - dat_d0+ dat_d0 - dat_ck+ dat_ck - sda_ic hpd_ic esd_disch dat_d2+_ic dat_d2 - _ic dat_d1+_ic dat_d1 - _ic dat_d0+_ic dat_d0 -_ic dat_ck+_ic dat_ck - _ic scl_ic vdd_cec gnd cec_ic vdd_ic fault nc hpd sda scl cec utility heac+ heac+ heac heac- ddc clock ddc data fault detect hdmi asic 4 tmds c hannals, 8 lines
docid023674 rev 2 15/32 HDMI2C1-14HD application information 32 table 2. pin description pin name description pin name description 1 sda_ic ddc input asic side 19 dat_ck- tmds output clock ck- 2 hpd_ic hpd output asic side 20 dat_ck+ tmds output clock ck+ 3 esd_disch esd protection enhancement capacitance 21 dat_d0- tmds output data d0- 4 dat_d2+_ic tmds input data d2+ 22 dat_d0+ tmds output data d0+ 5 dat_d2-_ic tmds input data d2- 23 dat_d1- tmds output data d1- 6 dat_d1+_ic tmds input data d1+ 24 dat_d1+ tmds output data d1+ 7 dat_d1-_ic tmds input data d1- 25 dat_d2- tmds output data d2- 8 dat_d0+_ic tmds input data d0+ 26 dat_d2+ tmds output data d2+ 9 dat_d0-_ic tmds input data d0- 27 nc not connected 10 dat_ck+_ic tmds input clock ck+ 28 5v_out +5v power supply hdmi cable side 11 dat_ck-_ic tmds input clock ck- 29 vdd_5v +5v main power supply 12 heac+ heac+ output asic side 30 vdd_cec cec supply hdmi cable side 13 heac- heac- output asic side 31 v dd_cec_ic cec driver power supply 14 hpd hpd/heac- input hdmi cable side 32 nc not connected 15 sda ddc output hdmi cable side 33 vdd_ic hdmi asic power supply 16 scl ddc output hdmi cable side 34 fault fault line output asic side 17 utility utility/heac+ input hdmi cable side 35 cec_ic cec input asic side 18 cec cec output hdmi cable side 36 scl_ic ddc input asic side pad gnd ground
application information HDMI2C1-14HD 16/32 docid023674 rev 2 figure 15. pin numbering 9''b9 9b287 qf '$7b' '$7b'  '$7b' '$7b'  '$7b' '$7b'  '$7b&. '$7b&.  6'$b, & +3'b, & (6'b',6&+ '$7b'b, & '$7b' b,& '$7b'b, & '$7b' b,& '$7b'b, & '$7b' b,& '$7b&.b, & '$7b&. b,& 6&/b, & 9''b&(& *1' &(&b, & +($ & 9''b, & +3' )$8/7 +($ & qf 6' $ 8wlolw \ 9' 'b&(&b, & 6&/ &(& 3lq 3 l q                                     
docid023674 rev 2 17/32 HDMI2C1-14HD electrical characteristics 32 3 electrical characteristics table 3. absolute maximum ratings (limiting values) symbol parameter test conditions value unit v pp_bus esd discharge on hdmi bus side (pin 14 to 26, and pin 28), iec 61000-4-2 level 4 contact discharge 8 (1) kv v pp_ic esd discharge (all pins), hbm jesd22-a114d level 2 contact discharge 2 kv t stg storage temperature range -55 to +150 c t op operating temperature range -40 to +85 c t l maximum lead temperature 260 c v dd_5v v dd_ic v dd_cec v dd_cec_ic supply voltages 6 v inputs logical input min/max voltage range -0.3 to 6 v 1. with a 100 nf capacitor connected to the 5v_out pin. table 4. power supply characteristics (t amb = 25 c) symbol parameter test conditions min. typ. max. unit v dd_cec cec supply voltage, bus side 2.97 3.3 3.63 v v dd_cec_ic cec supply voltage, ic side 1.62 3.63 v v dd_ic low-voltage asic supply voltage 1.62 3.63 v v dd_5v 5 v input supply voltage range 4.9 5.0 5.3 v v dd_5v_on (1) +5 v power on reset 3.5 3.8 4.1 v v dd_cec_on cec power on reset 2.6 2.8 2.95 v i qs_5v quiescent currents on v dd_5v , v dd_ic , v dd_cec , v dd_cec_ic v dd_5v = 5 v, v dd_ic = 1.8 v, v dd_cec = 3.3 v v dd_cec_ic = 1.8 v idle-state on cec and ddc links, hpd and 5v_out links open 600 a i qs_ic 75 i qs_cec 200 i qs_cec_ic 40 i leak back drive current for 5v_out, sda, scl, hpd v dd_5v = 0 v, v dd_ic = 0 v, tested pin = 5 v 1a rth junction to ambient thermal resistance copper heatsink as shown by figure 28 75 c/w t sd thermal shutdown threshold 120 150 c p total_sb standby conditions v dd_5v = v dd_ic = 0v v dd_cec = 3.3v v dd_cec_ic = 3.3v 0.8 mw
electrical characteristics HDMI2C1-14HD 18/32 docid023674 rev 2 1. in order to activate the ddc functional bloc k, the 3 following conditions have to be met: - v dd_5v has to reach the v dd_5v_on threshold - the inputs and outputs of the bidirectional level shifter must be set to a high level after the power-on - the hpd line has to be activated one time table 5. cec electrical characteristics (1) symbol parameter test conditions min. typ. max. unit v tup_cec upward input voltage threshold on bus side 2.0 v v tdown_cec downward input voltage threshold on bus side 0.8 v v hyst_cec input hysteresis on bus side 0.4 v t rise_cec output rise-time (10% to 90%) rup_cec = 14.1 k ? (2) c cec_cable = 7.9 nf (2) 250 s t fall_cec output fall-time (90% to 10%) 50 s i off_cec leakage current in powered-off state v dd_5v = 0 v v dd_ic = 0 v, v dd_cec = 3.3 v 1.8 a v il_cec_ic input low level on ic side 0.5 v v ih_cec_ic input high level on ic side v ih_cec_ic = 1.8 v 1.5 v v ih_cec_ic = 3.3 v 1.9 r on_cec on resistance across cec and cec_ic pins cec pin to 0 v 100 ? c in_cec input capacitance on cec link v dd_5v = 0 v v dd_cec = 0 v v dd_ic = 0 v v bias = 0 v, f = 1 mhz, v osc = 30 mv 25 (3) pf 1. t amb = 25 c, v dd_cec = 3.3 v, v dd_cec_ic = 1.8 v, unless otherwise specified 2. test conditions are compliant wi th worst case cec specification: - correspond to two 27 k ? +5% pull-up resistances in parallel (compliant with hdmi cts) - max capacitance corresponding to 9 equipment chained on the cec bus 3. maximum capacitance allowed at connector output is 200 pf in hdmi 1.4 specification table 6. 5v_out current limiter electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. v drop drop-out voltage i 5v_out = 55 ma 20 50 95 (2) mv i 5v_out output current (3) v 5v_out = 0 v 55 115 ma v l_fault low level on fault pin r pu_fault = 10 k ? 0.3 v 1. t amb = 25c, v dd_5v = 5 v, unless otherwise specified 2. hdmi 1.4 specification requires a maximum of 100 mv voltage-drop 3. hdmi 1.4 standard specifies a minimal current capability of 55 ma, and an over-current protection of no more than 500 ma
docid023674 rev 2 19/32 HDMI2C1-14HD electrical characteristics 32 table 7. hpd, heac, and utility line electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. i pull_down pull-down current in hpd block 15 25 a v th_hpd hpd input threshold 1.0 1.7 v cin_hpd cin_utilit y input capacitance v dd_5v = 0 v, v bias = 0 v f = 1 mhz, v osc = 30 mv 9pf f cut_heac cut-off frequency of heac bus 500 mhz 1. tamb = 25c, v dd_5v = 5 v, unless otherwise specified. table 8. ddc bus (sda and scl lines) electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. v tup_bus upward input voltage threshold on bus side 3.5 v v tdown_bus downward input voltage threshold on bus side 1.5 v v hyst_bus input hysteresis on bus side 1.0 1.3 v v ol_bus output low level current sunk by sda ? and scl pin is 3 ma 0.35 v t rise_bus output rise-time (30% to 70%) c bus = 750 pf (2) r up = 2 k ? //47 k ? + 10% (3) 500 ns t fall_bus output fall-time (30% to 70%) 50 ns v tup_ic upward input voltage threshold on ic side 55 60 65 %v dd_ic v tdown_ic downward input voltage thresholds ic side 35 40 45 %v dd_ic v ol_ic output low level on ic side current sunk by sda_ic or scl_ic pins is 500 a 20 %v dd_ic c in_ddc input capacitance on ddc link v dd_5v = 0 v v dd_ic = 0 v v dd_cec = 0 v v bias = 0 v, f = 1 mhz v osc = 30 mv 917 (4) pf 1. t amb = 25 c, v dd_5v = 5 v, v dd_ic = 1.8 v, unless otherwise specified 2. maximum load capacitance allowed on i2c entire link (c able + connector) is 750 pf in hdmi 1.4 specification. 3. two pull-up resistors in parallel (sink 47 k ?? + source 2 k ? ). 4. maximum capacitance allowed at connector output is 50 pf in hdmi 1.4 specification
electrical characteristics HDMI2C1-14HD 20/32 docid023674 rev 2 figure 16. tmds line s 21 frequency curve table 9. tmds links electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. f cut_tmds bandwidth at - 3db single ended mode 4.7 (2) ghz differential mode 6.5 (2) v br breakdown voltage 6 v i rm leakage current v rm = 3.3 v 100 na c i/o-gnd capacitance input/output to ground v i/o =0 v, f=1 mhz, v osc =30 mv 1.5 pf v cl clamping voltage i pp = 16 a, iec61000-4-2, i/o to gnd, esd_disch = 1 f 10 v ? c i/o-gnd capacitance variation v i/o = 0v, f=1 mhz, v osc =30 mv 50 ff z diff differential impedance tr = 200ps (10%-90%) z0 diff =100 ? 85 100 115 ? 1. tamb =25c, vdd_5v = 5v, unless otherwise specified 2. the bandwidth is large enough to operate up to 340 mhz as hd mi clock frequency, corresponding to 10.2 gbps total data rate, 3.4 gbps on each lane s cc21 s dd21 0 -3 -6 -9 -12 -15 100k 1m 10m 100m 1g f(hz) s 21 (db)
docid023674 rev 2 21/32 HDMI2C1-14HD electrical characteristics 32 figure 17. tmds line differen tial far end crosstalk curve figure 18. tmds line: remaining voltage when positive 8 kv esd surge applied figure 19. tmds line: remaining voltage when negative 8 kv esd surge applies 10m 30m 100m 300m 1g 3g 10g -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 db d2 -d1_fext d2 -clk_fext f(hz) 100.9 v 13.1 v 11.7 v 7.5 v 1 2 4 3 v : esd peak voltage v :clamping voltage @ 30 ns v :clamping voltage @ 60 ns pp cl cl v :clamping voltage @ 100 ns cl 1 2 3 4 20 v/div 20 ns/div -67.9 v 3.3 v -5.1 v -4.8 v 20 ns/div 1 2 4 3 v : esd peak voltage v :clamping voltage @ 30 ns v :clamping voltage @ 60 ns pp cl cl v :clamping voltage @ 100 ns cl 1 2 3 4 20 v/div
electrical characteristics HDMI2C1-14HD 22/32 docid023674 rev 2 figure 20. eye diagram of tmds line: d0, d1, d2 and clk lanes (1.485 gbps) figure 21. eye diagram of tmds line: d0, d1, d2 and clk lanes (3.350 gbps) figure 22. tdr of tmds lines: d0, d1, d2, clk lanes 250 mv/div 112.2 ps/div 250 mv/div 49.8 ps/div tdr rise time (10%-90%): 200ps 100 89.8
docid023674 rev 2 23/32 HDMI2C1-14HD electrical characteristics 32 figure 23. cec typical waveforms (source to sink communication) figure 24. cec typical waveforms (sink to source communication) figure 25. ddc typical waveforms (sink to source communication) c2 = 1.00 v/div c3 = 500 m v/div 100 s/div c2 = 1.00 v/div c3 = 500 m v/div 100 s/div 2 s/div c2 = 1.00 v/div c3 = 500 m v/div
electrical characteristics HDMI2C1-14HD 24/32 docid023674 rev 2 figure 26. ddc typical waveforms (source to sink communication) figure 27. hpd typical waveforms (timing) figure 28. heac single ended mode typical bandwidth c3 = 500 m v/div c2 = 1.00 v/div 2 s/div c3 = 500 m v/div c2 = 1.00 v/div 1 s/div 100k 1m 10m 100m 1g 10g -18 -15 -12 -9 -6 -3 0 f/hz heac - f(hz) db
docid023674 rev 2 25/32 HDMI2C1-14HD package information 32 4 package information ? epoxy meets ul94, v0 ? lead-free packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 qfn package information figure 29. qfn package outline
package information HDMI2C1-14HD 26/32 docid023674 rev 2 figure 30. qfn footprint recommendation (dimensions in mm) table 10. qfn package mechanical data ref. dimensions millimeters inches (1) 1. values in inches are converted from mm and rounded to 4 decimal digits. typ. min. max. typ. min. max. a 0.85 0.90 0.95 0.033 0.035 0.037 a1 0.00 0.05 0.000 0.002 b 0.18 0.25 0.30 0.007 0.010 0.012 d 3.40 3.50 3.60 0.134 0.137 0.141 d2 2.25 2.30 2.35 0.088 0.090 0.092 e 6.40 6.50 6.60 0.251 0.255 0.259 e2 5.25 5.30 5.35 0.206 0.208 0.210 e 0.50 0.020 la 0.00 0.10 0.20 0.00 0.004 0.008 lb 0.15 0.25 0.30 0.006 0.01 0.012 lc 0.20 0.30 0.40 0.008 0.012 0.016 ddd 0.09 0.003          3,11& 3,11& 3,1
docid023674 rev 2 27/32 HDMI2C1-14HD package information 32 4.2 packing information figure 31. marking specification figure 32. tape and reel outline 2c1-14hd ccc y ww g e3 w x ccc : country of origin y : assy year w w : assy week g : eco level w x : diffusion traceability 8.0 2.0 16.0 6.75 7.5 3.75 4.0 ? 1.55 1.75 0.9 user direction of unreeling all dimension in mm ? 1.5
recommendation on pcb assembly HDMI2C1-14HD 28/32 docid023674 rev 2 5 recommendation on pcb assembly 5.1 stencil opening design 1. general recommendation on stencil opening design a) stencil opening dimensions: l (length), w (width), t (thickness). figure 33. stencil opening dimensions b) general design rule stencil thickness (t) = 75 ~ 125 m 2. reference design a) stencil opening thickness: 100 m b) stencil opening for central exposed pad: opening to footprint ratio is 50%. c) stencil opening for leads: opening to footprint ratio is 90%. figure 34. recommended stencil window position l t w aspect ratio w t ----- 1,5 ? = aspect area lw ? 2t l w + ?? --------------------------- - 0,66 ? = 0.50 0.30 0.50 0.25 5.30 0.25 stencil window footprint 0.45 0.23 286 m 3.8 mm 300 m 5.3 mm 7 m 750 m 2.30 474 m 1.7 mm 13 m 300 m 500 m 2.3 mm
docid023674 rev 2 29/32 HDMI2C1-14HD recommendation on pcb assembly 32 5.2 solder paste 1. use halide-free flux, qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste recommended. 3. offers a high tack force to resist component displacement during pcb movement. 4. use solder paste with fine particle s: powder particle size 20-45 m. 5.3 placement 1. manual positioning is not recommended. 2. it is recommended to use th e lead recognition ca pabilities of the placement system, not the outline centering. 3. standard tolerance of 0.05 mm is recommended. 4. 3.5 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy , a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 5.4 pcb design preference 1. to control the solder paste amount, clos ed vias are recommended instead of open vias. 2. the position of tracks and open vias in the solder area should be well balanced. symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
recommendation on pcb assembly HDMI2C1-14HD 30/32 docid023674 rev 2 5.5 reflow profile figure 35. st ecopack ? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. 250 0 50 100 150 200 240 210 180 150 120 90 60 30 300 270 - 6c/s 240-245 c 2 - 3 c/s temperature (c) -2 c/s -3 c/s time (s) 0.9 c/s 60 sec (90 max)
docid023674 rev 2 31/32 HDMI2C1-14HD ordering information 32 6 ordering information figure 36. ordering information scheme 7 revision history table 11. ordering information order code marking package weight base qty delivery mode HDMI2C1-14HD 2c1-14hd qfn 51,6 mg 4,000 tape and reel hdmi2c 1 - 14 hd hdmi and i2c compliant links number of protected links 14 lines protected according to iec 6100-4-2 version hd : full speed of hdmi supported hdmi port type 1: source ports table 12. document revision history date revision changes 23-jan-2013 1 initial release 04-may-2015 2 updated features , applications , description and figure 30 . added figure 2 and back drive protection . updated table 1 , ta ble 4 , table 9 and reformatted to current standard.
HDMI2C1-14HD 32/32 docid023674 rev 2 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved


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